Field of the Invention
The invention relates to a method for producing a metal layer with a given thickness, in particular to a method for producing a metal layer with a given thickness for an integrated component.
Modern data processing applications require a high computation performance. A major factor in providing such a high computation performance is the speed of the processor, or the speed of the core memory. As the complexity of the processors and of the core memory increases, and as the individual transistors become increasingly smaller, the speed of the processor is becoming ever less dependent on the speed of the individual transistors, and is being governed increasingly by the connections between the individual transistors. In this case, the delays, which are caused by the connections, decrease with a decreasing resistance of the individual connections.
Accordingly, one approach to increasing the speed of the processor or of the core memory is to reduce the resistance of the connections between the transistors. In the past, aluminum as mainly used for the connections (interconnects). Aluminum is used since it is relatively cheap, and can be structured relatively easily. Unfortunately, however, the resistance of an interconnect made of aluminum is relatively high. Furthermore, electromigration problems frequently occur in aluminum interconnects, and these can lead to failure of the integrated circuit.
Attempts have thus recently been made to replace the aluminum used for producing interconnects until now by other metals such as copper or silver. For example, copper has a considerably lower electrical resistance than aluminum and is distinguished by having a good electromigration behavior. Unfortunately, copper also has a number of negative characteristics. For example, copper can be structured only with great difficulty. The normal dry-etching processes which are used to structure aluminum interconnects can thus be used only with increased effort to structure copper interconnects. Furthermore, copper atoms very easily diffuse through silicon oxide, which is generally used for insulation. This can lead to the silicon oxide losing its insulating characteristics and copper atoms being able to reach the silicon substrate. Both effects can lead to total failure of the electrical circuits. The copper therefore has to be sheathed by a barrier layer, for example, of tantalum or tantalum nitride, in an appropriate manner during the production of interconnects.
Due to the above problems, the so-called damascene technique is generally used for producing copper interconnects. In this case, the structure of the interconnects which are still to be produced is first of all produced as trenches in an insulating layer. The trenches are then lined with a barrier layer and, finally copper is applied over the entire surface. In this case, the copper is applied such that it fills the trenches and a closed or uninterrupted copper layer is produced on the surface. This closed copper layer is then removed from the surface through the use of a CMP (chemical/mechanical polishing) step so that only the copper in the trenches remains. It is extraordinarily important for this CMP step that the copper layer always has a predetermined layer thickness.
The copper layer is normally produced through the use of an electrochemical method. To this end, the pre-structured substrate onto which the copper layer is intended to be applied is immersed in an electrochemical solution, from which the copper is deposited. The thickness of the deposited copper layer depends on the deposition parameters, such as the applied voltage, the deposition time and the state of the electrochemical solution. In order to ensure that the predetermined layer thickness is maintained over a number of silicon wafers, a so-called check wafer is in each case generally inserted before a specific number of silicon wafers, in order to determine the thickness of the copper layer. This measurement is then used as the basis to set the deposition time for the subsequent wafers.
However, this procedure is very time-consuming since the check wafer must be removed from the production process and taken to an instrument specifically provided for this purpose. The actual production process cannot continue until the thickness of the layer has been determined. The layer thickness measurement frequently then indicates that the copper layer has been deposited too thinly, as a result of which the check wafer, and, possibly, the wafers processed immediately before it, are unusable for further production, and must therefore be removed.